This method uses quantified conjunctive normal form (CNF) formulas to represent the unknown constraints in the circuit under verification, and needs no modification of the circuit structure so that it saves the computational resources significantly.

• 该方法使用量化的合取范式 (CNF)来表示电路中出现的未知约束 ；并且不需要修改电路结构 ；有效地节省了计算资源 .