This architecture is consisted of a two-dimensional array of PEs(processing elements), and the PEs in the same row or column work as a SIMD unit, and different SIMD units can work parallelly.
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释义
该结构是指N X N个处理单元按一定的拓扑结构连接而成的阵列结构,同行/列的处理单元以SIMD的方式工作,不同行/列相当于并行执行的SIMD功能部件。