The proposed architectures can be operated at arbitrarily high sample rate without degrading the convergence behavior and consist of only Givens rotations, which can be scheduled onto CORDIC arithmetic-based processors based on FPGA.

• 阐述了系统的基于FPGA的硬件构架，该构架的宏单元由能够完成Givens旋转的CORDIC运算宏单元来充当，而且可以在不损失收敛速度的前提下达到很高的采样速率。