Low power design is the most difficulties in DMB-H receiver core, and the key of its low power VLSI implementation is 3780 IFFT and QC-LDPC iterative decoder.

• 低功耗设计是DMB-H接收芯片面临的最大挑战，其中3780 IFFT和QC-LDPC信道译码是低功耗VLSI实现的关键。